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Citra Git Changelog:
* Merge pull request #599 from Subv/morton
GPU: Implemented bits 3 and 1 from the display transfer flags.
* GPU: Implemented bits 3 and 1 from the display transfer flags.
Bit 3 is used to specify a raw copy, where no processing is done to the data, seems to behave exactly as a DMA.
Bit 1 is used to specify whether to convert from a tiled format to a linear format or viceversa.
* Merge pull request #614 from lioncash/mcr
arm: The CP15 Main ID register is not writeable
* arm: The CP15 Main ID register is not writeable
Download: Citra Git (2015/02/27) x86
Download: Citra Git (2015/02/27) x64
Source: Here
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